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Tracking
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| Source | ID | Title |
|---|---|---|
EUVD |
EUVD-2025-17610 | In AMD Versal Adaptive SoC devices, the incorrect configuration of the SSS during runtime (post-boot) cryptographic operations could cause data to be incorrectly written to and read from invalid locations as well as returning incorrect cryptographic data. |
Fri, 11 Jul 2025 13:45:00 +0000
| Type | Values Removed | Values Added |
|---|---|---|
| Metrics |
epss
|
epss
|
Tue, 10 Jun 2025 16:15:00 +0000
| Type | Values Removed | Values Added |
|---|---|---|
| Metrics |
ssvc
|
Tue, 10 Jun 2025 00:15:00 +0000
| Type | Values Removed | Values Added |
|---|---|---|
| Description | In AMD Versal Adaptive SoC devices, the incorrect configuration of the SSS during runtime (post-boot) cryptographic operations could cause data to be incorrectly written to and read from invalid locations as well as returning incorrect cryptographic data. | |
| Weaknesses | CWE-497 CWE-682 CWE-772 CWE-940 CWE-941 |
|
| References |
| |
| Metrics |
cvssV3_1
|
Subscriptions
No data.
Status: PUBLISHED
Assigner: AMD
Published:
Updated: 2025-06-30T14:48:59.255Z
Reserved: 2024-11-21T16:18:02.918Z
Link: CVE-2025-0036
Updated: 2025-06-10T14:19:47.545Z
Status : Deferred
Published: 2025-06-10T00:15:21.197
Modified: 2026-04-15T00:35:42.020
Link: CVE-2025-0036
No data.
OpenCVE Enrichment
No data.
EUVD