powerpc/64s/slb: Fix SLB multihit issue during SLB preload
On systems using the hash MMU, there is a software SLB preload cache that
mirrors the entries loaded into the hardware SLB buffer. This preload
cache is subject to periodic eviction — typically after every 256 context
switches — to remove old entry.
To optimize performance, the kernel skips switch_mmu_context() in
switch_mm_irqs_off() when the prev and next mm_struct are the same.
However, on hash MMU systems, this can lead to inconsistencies between
the hardware SLB and the software preload cache.
If an SLB entry for a process is evicted from the software cache on one
CPU, and the same process later runs on another CPU without executing
switch_mmu_context(), the hardware SLB may retain stale entries. If the
kernel then attempts to reload that entry, it can trigger an SLB
multi-hit error.
The following timeline shows how stale SLB entries are created and can
cause a multi-hit error when a process moves between CPUs without a
MMU context switch.
CPU 0 CPU 1
----- -----
Process P
exec swapper/1
load_elf_binary
begin_new_exc
activate_mm
switch_mm_irqs_off
switch_mmu_context
switch_slb
/*
* This invalidates all
* the entries in the HW
* and setup the new HW
* SLB entries as per the
* preload cache.
*/
context_switch
sched_migrate_task migrates process P to cpu-1
Process swapper/0 context switch (to process P)
(uses mm_struct of Process P) switch_mm_irqs_off()
switch_slb
load_slb++
/*
* load_slb becomes 0 here
* and we evict an entry from
* the preload cache with
* preload_age(). We still
* keep HW SLB and preload
* cache in sync, that is
* because all HW SLB entries
* anyways gets evicted in
* switch_slb during SLBIA.
* We then only add those
* entries back in HW SLB,
* which are currently
* present in preload_cache
* (after eviction).
*/
load_elf_binary continues...
setup_new_exec()
slb_setup_new_exec()
sched_switch event
sched_migrate_task migrates
process P to cpu-0
context_switch from swapper/0 to Process P
switch_mm_irqs_off()
/*
* Since both prev and next mm struct are same we don't call
* switch_mmu_context(). This will cause the HW SLB and SW preload
* cache to go out of sync in preload_new_slb_context. Because there
* was an SLB entry which was evicted from both HW and preload cache
* on cpu-1. Now later in preload_new_slb_context(), when we will try
* to add the same preload entry again, we will add this to the SW
* preload cache and then will add it to the HW SLB. Since on cpu-0
* this entry was never invalidated, hence adding this entry to the HW
* SLB will cause a SLB multi-hit error.
*/
load_elf_binary cont
---truncated---
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Tracking
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| Source | ID | Title |
|---|---|---|
Debian DLA |
DLA-4476-1 | linux-6.1 security update |
Debian DSA |
DSA-6126-1 | linux security update |
Debian DSA |
DSA-6127-1 | linux security update |
Ubuntu USN |
USN-8096-1 | Linux kernel vulnerabilities |
Ubuntu USN |
USN-8096-2 | Linux kernel (FIPS) vulnerabilities |
Ubuntu USN |
USN-8096-3 | Linux kernel vulnerabilities |
Ubuntu USN |
USN-8096-4 | Linux kernel (Real-time) vulnerabilities |
Ubuntu USN |
USN-8096-5 | Linux kernel (NVIDIA Tegra IGX) vulnerabilities |
Ubuntu USN |
USN-8116-1 | Linux kernel (Intel IoTG Real-time) vulnerabilities |
Ubuntu USN |
USN-8141-1 | Linux kernel (Raspberry Pi) vulnerabilities |
Ubuntu USN |
USN-8163-1 | Linux kernel (Azure FIPS) vulnerabilities |
Ubuntu USN |
USN-8163-2 | Linux kernel (Azure) vulnerabilities |
Ubuntu USN |
USN-8177-1 | Linux kernel vulnerabilities |
Ubuntu USN |
USN-8179-1 | Linux kernel vulnerabilities |
Ubuntu USN |
USN-8177-2 | Linux kernel (Real-time) vulnerabilities |
Ubuntu USN |
USN-8183-1 | Linux kernel (GCP) vulnerabilities |
Ubuntu USN |
USN-8184-1 | Linux kernel (Real-time) vulnerabilities |
Ubuntu USN |
USN-8179-2 | Linux kernel (FIPS) vulnerabilities |
Ubuntu USN |
USN-8185-1 | Linux kernel (NVIDIA) vulnerabilities |
Ubuntu USN |
USN-8179-3 | Linux kernel vulnerabilities |
Ubuntu USN |
USN-8183-2 | Linux kernel vulnerabilities |
Ubuntu USN |
USN-8203-1 | Linux kernel (Oracle) vulnerabilities |
Ubuntu USN |
USN-8204-1 | Linux kernel (Raspberry Pi Real-time) vulnerabilities |
Ubuntu USN |
USN-8185-2 | Linux kernel (Low Latency NVIDIA) vulnerabilities |
Ubuntu USN |
USN-8179-4 | Linux kernel (GCP) vulnerabilities |
Ubuntu USN |
USN-8243-1 | Linux kernel (Azure) vulnerabilities |
Ubuntu USN |
USN-8245-1 | Linux kernel vulnerabilities |
Ubuntu USN |
USN-8257-1 | Linux kernel (Raspberry Pi) vulnerabilities |
Ubuntu USN |
USN-8258-1 | Linux kernel (Azure) vulnerabilities |
Ubuntu USN |
USN-8260-1 | Linux kernel (Azure FIPS) vulnerabilities |
Ubuntu USN |
USN-8261-1 | Linux kernel (Xilinx) vulnerabilities |
Ubuntu USN |
USN-8265-1 | Linux kernel (NVIDIA Tegra) vulnerabilities |
Wed, 25 Mar 2026 20:00:00 +0000
| Type | Values Removed | Values Added |
|---|---|---|
| Weaknesses | NVD-CWE-noinfo | |
| CPEs | cpe:2.3:o:linux:linux_kernel:4.20:-:*:*:*:*:*:* cpe:2.3:o:linux:linux_kernel:6.19:rc1:*:*:*:*:*:* cpe:2.3:o:linux:linux_kernel:6.19:rc2:*:*:*:*:*:* cpe:2.3:o:linux:linux_kernel:6.19:rc3:*:*:*:*:*:* cpe:2.3:o:linux:linux_kernel:6.19:rc4:*:*:*:*:*:* cpe:2.3:o:linux:linux_kernel:6.19:rc5:*:*:*:*:*:* cpe:2.3:o:linux:linux_kernel:6.19:rc6:*:*:*:*:*:* cpe:2.3:o:linux:linux_kernel:6.19:rc7:*:*:*:*:*:* cpe:2.3:o:linux:linux_kernel:6.19:rc8:*:*:*:*:*:* |
|
| Metrics |
cvssV3_1
|
cvssV3_1
|
Mon, 19 Jan 2026 12:45:00 +0000
| Type | Values Removed | Values Added |
|---|---|---|
| References |
|
Thu, 15 Jan 2026 12:15:00 +0000
| Type | Values Removed | Values Added |
|---|---|---|
| References |
| |
| Metrics |
threat_severity
|
cvssV3_1
|
Tue, 13 Jan 2026 15:45:00 +0000
| Type | Values Removed | Values Added |
|---|---|---|
| Description | In the Linux kernel, the following vulnerability has been resolved: powerpc/64s/slb: Fix SLB multihit issue during SLB preload On systems using the hash MMU, there is a software SLB preload cache that mirrors the entries loaded into the hardware SLB buffer. This preload cache is subject to periodic eviction — typically after every 256 context switches — to remove old entry. To optimize performance, the kernel skips switch_mmu_context() in switch_mm_irqs_off() when the prev and next mm_struct are the same. However, on hash MMU systems, this can lead to inconsistencies between the hardware SLB and the software preload cache. If an SLB entry for a process is evicted from the software cache on one CPU, and the same process later runs on another CPU without executing switch_mmu_context(), the hardware SLB may retain stale entries. If the kernel then attempts to reload that entry, it can trigger an SLB multi-hit error. The following timeline shows how stale SLB entries are created and can cause a multi-hit error when a process moves between CPUs without a MMU context switch. CPU 0 CPU 1 ----- ----- Process P exec swapper/1 load_elf_binary begin_new_exc activate_mm switch_mm_irqs_off switch_mmu_context switch_slb /* * This invalidates all * the entries in the HW * and setup the new HW * SLB entries as per the * preload cache. */ context_switch sched_migrate_task migrates process P to cpu-1 Process swapper/0 context switch (to process P) (uses mm_struct of Process P) switch_mm_irqs_off() switch_slb load_slb++ /* * load_slb becomes 0 here * and we evict an entry from * the preload cache with * preload_age(). We still * keep HW SLB and preload * cache in sync, that is * because all HW SLB entries * anyways gets evicted in * switch_slb during SLBIA. * We then only add those * entries back in HW SLB, * which are currently * present in preload_cache * (after eviction). */ load_elf_binary continues... setup_new_exec() slb_setup_new_exec() sched_switch event sched_migrate_task migrates process P to cpu-0 context_switch from swapper/0 to Process P switch_mm_irqs_off() /* * Since both prev and next mm struct are same we don't call * switch_mmu_context(). This will cause the HW SLB and SW preload * cache to go out of sync in preload_new_slb_context. Because there * was an SLB entry which was evicted from both HW and preload cache * on cpu-1. Now later in preload_new_slb_context(), when we will try * to add the same preload entry again, we will add this to the SW * preload cache and then will add it to the HW SLB. Since on cpu-0 * this entry was never invalidated, hence adding this entry to the HW * SLB will cause a SLB multi-hit error. */ load_elf_binary cont ---truncated--- | |
| Title | powerpc/64s/slb: Fix SLB multihit issue during SLB preload | |
| First Time appeared |
Linux
Linux linux Kernel |
|
| CPEs | cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* | |
| Vendors & Products |
Linux
Linux linux Kernel |
|
| References |
|
|
Status: PUBLISHED
Assigner: Linux
Published:
Updated: 2026-05-11T21:54:18.759Z
Reserved: 2026-01-13T15:30:19.648Z
Link: CVE-2025-71078
No data.
Status : Analyzed
Published: 2026-01-13T16:16:07.317
Modified: 2026-03-25T19:46:32.647
Link: CVE-2025-71078
OpenCVE Enrichment
No data.
Debian DLA
Debian DSA
Ubuntu USN